1. Field of the Invention
The present invention relates to the design of power supply circuits for electrical and electronic equipment. More specifically, the present invention pertains to the reduction of power consumption in a digital display device in standby mode.
2. Related Art
With the increasingly widespread use of computer systems in business and education and at home, it is important to conserve energy by reducing the power consumption of the display devices used with computer systems. Many display devices today provide a mechanism by which the appliance enters a xe2x80x9cstandby modexe2x80x9d after a period of inactivity, wherein the device remains xe2x80x9conxe2x80x9d even though it is not currently being used. While in the standby mode, the device consumes less power than it does while in active use under normal operating conditions (the xe2x80x9cmain modexe2x80x9d). When activity resumes, the device exits its standby mode and reenters its main mode, and power consumption increases to the normal level. As such, power is conserved in standby mode, and the requisite power level for main mode operation is promptly restored upon the resumption of active use.
Recent regulations, such as those in Europe, stipulate that the power consumption of display devices in standby mode is to be less than one (1) watt (W), instead of the conventional three (3) watts. This and other similar regulatory changes, as well as the desire to conserve power, call for the industry to develop new circuits for implementing a standby mode in display devices that can meet current and pending power consumption requirements.
Several prior art circuits have been developed that use the synchronization (sync) signal(s) that are sent from the computer to the display device, such as the horizontal sync (h-sync) signal and vertical sync (v-sync) signal, as the trigger to switch between main mode and standby mode. In the display device art, it is known that when both the h-sync (horizontal) and v-sync (vertical) signals are present, either separately or in combination, the display device should be in main mode; that when only the v-sync signal is present, the display device should be in suspend mode; and that when only the h-sync signal is present, the display device should be in standby mode. Thus, a sync detect circuit can be used in conjunction with a microprocessor to monitor the sync signal(s) and control the voltage supplied to the monitor accordingly, thereby controlling the power it consumes.
Prior Art FIG. 1 illustrates one prior art circuit 100 wherein two power supplies are used to implement switching between main mode and standby mode. More particularly, prior art circuit 100 has an alternating current (AC) power input 101 and two separate power supplies 110 and 120, wherein AC input 101 is coupled to a main power supply 110 and a standby power supply 120 in parallel. Additionally, a microprocessor 130 is coupled between main power supply 110 and standby power supply 120. Furthermore, a sync detect circuit 140 is coupled between standby power supply 120 and microprocessor 130. Sync detect circuit 140 is also coupled to a computer 199.
In this prior art circuit 100, when the display device is operating in main mode, main power supply 110 provides power to the display device and other circuit elements (e.g., microprocessor 130 and sync detect circuit 140) via outputs 111, 112, 113 and 114. Typical values for these outputs of main power supply 110 are: +200 volts for output 111, +80 volts for output 112, +16 volts for output 113, and xe2x88x9216 volts for output 114. With these exemplary values, outputs 111 and 112 are typically coupled to the display device, and outputs 113 and 114 are typically coupled to the horizontal and vertical differentials (h-diff and v-diff) of the display device. In the same circuit 100, when the display device is in standby mode and is inactive, standby power supply 120 provides power to microprocessor 130 via output 123 (e.g., 5 volts or 3.3 volts) and to sync detect circuit 140 via output 124 (e.g., 5 volts or 3.3 volts).
Still referring to Prior Art FIG. 1, sync detect circuit 140 serves as a buffer between computer 199 and microprocessor 130. When sync detect circuit 140 no longer detects a sync signal 194 from computer 199, sync detect circuit 140 sends a xe2x80x9cno_syncxe2x80x9d signal 143 to microprocessor 130, which in turn sends an xe2x80x9coffxe2x80x9d signal 131 to main power supply 110. In response to off signal 131, main power supply 110 is turned off and the display device enters standby mode.
Note that standby power supply 120 remains on while the display device is in standby mode, in order to power microprocessor 130 and sync detect circuit 140. In other words, standby power supply 120 is always on irrespective of whether the display device is in main mode or standby mode. As such, sync detect circuit 140 continues to monitor for sync signal 194 from computer 199 while the display device is in standby mode. Upon detecting the resumption of signal 194 from computer 199, sync detect circuit 140 sends a xe2x80x9csyncxe2x80x9d signal 143 to microprocessor 130, which in turn sends an xe2x80x9conxe2x80x9d signal 131 to main power supply 110. In response, main power supply 110 is turned on again and the display device thus resumes its main mode of operation.
One major disadvantage of prior art circuit 100 of FIG. 1 is that standby power supply 120 remains on even when the display device is in standby mode. The constant presence of an active power supply in circuit 100 means that power loss due to the switching action of the power supply (switching loss) cannot be avoided. Consequently, it is difficult to achieve a low power consumption level using prior art circuit 100. For example, with AC input 101 at approximately 230 volts (typical for European appliances), and with the exemplary values described above with respect to outputs 123 and 124 (5 volts or 3.3 volts), prior art circuit 100 cannot consistently achieve a standby power consumption of 1 W or less, as is required by the new European standard. Furthermore, prior art circuit 100 is also expensive to implement because an extra power supply (namely, standby power supply 120) is always required in addition to main power supply 110.
FIG. 2 illustrates another prior art circuit 200 wherein a single power supply is used to implement switching between main mode and standby mode. More specifically, prior art circuit 200 has an AC power input 201 and a power supply 210, wherein AC input 201 is coupled to power supply 210 having four outputs 211, 212, 213 and 214. Typical values for these outputs of power supply 210 while the display device is in main mode are: +200 volts for output 211, +80 volts for output 212, +16 volts for output 213, and xe2x88x9216 volts for output 214.
Outputs 211 and 212 are typically coupled to the display device, and outputs 213 and 214 are typically coupled to the horizontal and vertical differentials (h-diff and v-diff) of the display device. Output 211 is also coupled to a voltage drop circuit 250, and output 213 is also coupled to a voltage regulator 260. Voltage regulator 260 is coupled to a microprocessor 230 via line 263, and to a sync detect circuit 240 via line 264. Thus, voltage regulator 260 is coupled between power supply 210 and microprocessor 230, as well as between power supply 210 and sync detect circuit 240. Sync detect circuit 240 is further coupled to microprocessor 230 and to a computer 299. Furthermore, microprocessor 230 is coupled to voltage drop circuit 250, which is in turn coupled to voltage regulator 260.
Referring to both Prior Art FIGS. 1 and 2, it is noted that prior art circuit 200 differs from prior art circuit 100 in that it utilizes a single power supply (namely, power supply 210) to provide power to the display device and other circuit elements (e.g., microprocessor 230 and sync detect circuit 240), irrespective of whether the display device is operating in main mode or standby mode. In other words, there is no separate power supply (e.g., standby power supply 120) for powering the microprocessor 230 and sync detect circuit 240, as is the case in prior art circuit 100. In particular, in prior art circuit 200, power is provided to microprocessor 230 and sync detect circuit 240 through voltage regulator 260.
Referring to Prior Art FIG. 2, sync detect circuit 240 serves as a buffer between computer 299 and microprocessor 230. While the display device is operating in main mode, voltage drop circuit 250 is off and voltage regulator 260 is powered by output 213 of power supply 210 at about +16 volts. When sync detect circuit 240 ceases to detect a sync signal 294 from computer 299, sync detect circuit 240 sends a xe2x80x9cno_syncxe2x80x9d signal 243 to microprocessor 230, which in turn sends an xe2x80x9conxe2x80x9d signal 235 to voltage drop circuit 250. In response, voltage drop circuit 250 is turned on. As a result, the voltage at output 211 of power supply 210 drops from about +200 volts to about +12 volts, whereas the voltage at output 213 of power supply 210 drops from about +16 volts to essentially zero volts. At this time, the display device enters standby mode, wherein power supply 210 remains on but delivers reduced outputs due to the action of voltage drop circuit 250.
In standby mode, voltage regulator 260 no longer derives power via output 213 but instead via voltage drop circuit 250 over line 256. As such, voltage regulator 260 continues to furnish power to microprocessor 230 and to sync detect circuit 249, which continues to monitor for sync signal 294 from computer 299 while the display device is in standby mode. Upon detecting the resumption of signal 294 from computer 299, sync detect circuit 240 sends a xe2x80x9csyncxe2x80x9d signal 243 to microprocessor 230, which in turn sends an xe2x80x9coffxe2x80x9d signal 235 to voltage drop circuit 250. In response, voltage drop circuit 250 is turned off again and the display device thus resumes its main mode of operation.
Like prior art circuit 100, one major disadvantage of prior art circuit 200 of FIG. 2 is the constant presence of an active power supply in circuit 200 (namely, power supply 210) means that power loss due to the switching action of the power supply (switching loss) cannot be avoided. Consequently, it is difficult to achieve a low power consumption level using prior art circuit 200. For instance, with AC input 201 at approximately 230 volts (typical for European appliances), and with the exemplary voltage of +12 volts delivered at output 211, prior art circuit 200 cannot consistently achieve a standby power consumption of 1 W or less, as is required by the new European standard. Furthermore, prior art circuit 200 is still relatively expensive to build because voltage drop circuit 250 and voltage regulator 260 are required for its implementation.
The design of a power mode switching circuit that can accomplish these objectives is complicated by the introduction of so-called digital display devices or monitors. In a digital display device, digital signals are used instead of analog signals for the red/green/blue (R/G/B) input signal and for the h-sync and v-sync signals. As described above, prior art circuits 100 and 200 (FIGS. 1 and 2, respectively) rely on the detection of analog signals such as the sync signals in order to know when to switch between main mode and standby mode. Consequently, prior art circuits such as circuits 100 and 200 will not function with a digital monitor, and these types of circuits cannot be used to switch a digital display device between the main and standby power modes.
In the main power mode, a digital display device is supplied by the computer system with an input voltage that is separate from the device""s primary power source. This input voltage is typically equal to five volts, and is not supplied when the computer system and the display device are in standby (or active off) mode. However, as in the analog devices discussed above, the digital display device still needs to maintain an active power supply in standby mode in order to monitor when the device should be switched from standby mode to main mode. Consequently, power consumption in the standby mode cannot be consistently maintained below 1 W, and thus the European standard is also problematic for digital display devices. Accordingly, what is needed is a circuit for power mode switching which consistently consumes less than 1 W power in standby mode and which can be used with digital monitors.
In implementing a viable circuit for power mode switching in a digital display device, the cost of realizing the circuit is also an important consideration. It is desirable to avoid costly expenditures for retrofitting existing computer systems and/or digital display devices with a circuit design that can reduce power consumption in accordance with the European standard.
Thus, a need exists for a system and method for power mode switching which consistently consumes less than 1 W power in standby mode. A further need exists for a system and method which meets the above need and which can be built at relatively low cost. Still another need exists for a system and method which can meet the above needs and which is conducive to use with digital display devices and/or other appliances with digital input signals.
The present invention pertains to a system and method for power mode switching in which power consumed in the standby power mode is consistently less than 1 W. The present invention further provides a system and method which is relatively inexpensive to build. Moreover, the present invention provides a system and method conducive to use with digital devices that use digital input signals. In one embodiment, the present invention is implemented with a digital display device, such as a digital monitor used in a computer system.
In the present embodiment, in addition to the power provided by the primary power source, the digital device receives a voltage from a secondary power source in main power mode. The voltages from the primary and secondary power sources are not received in standby power mode. In one embodiment, the primary power source supplies an alternating current substantially equal to 230 volts, and the secondary power source supplies five volts (in main power mode).
In accordance with the present invention, a circuit is coupled to the secondary power source for detecting the voltage from the secondary power source. In the present embodiment, the circuit includes an opto-coupler operable to detect a voltage from the secondary power source, and a transistor coupled to the opto-coupler. The use of these types of components makes the circuit of the present invention relatively inexpensive to build.
The transistor generates a first digital signal when the voltage is detected by the opto-coupler and a second digital signal when the voltage is not detected. An integrated circuit is coupled to the transistor. In response to the first digital signal, the integrated circuit is powered on and turns on the power supply for the digital device. In response to the second digital signal, the integrated circuit is powered off and turns off the power supply for the digital device.
Thus, in accordance with the present embodiment of the present invention, the power supply is turned on or off responsive to the opto-coupler. Accordingly, the digital device is switched between main power mode and standby power mode responsive to the opto-coupler.
As a result, in accordance with the present invention, it is not necessary for components of the digital device to remain powered on to detect the secondary power source in order to switch the device between power modes. Consequently, the digital device consumes less than 1 W of power in the standby power mode. These and other advantages of the present invention not specifically mentioned above will become clear within discussions of the present invention presented herein.